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/home/barbar84/public_h.../wp-conte.../plugins/sujqvwi/ExeBy/smexe_ro.../usr/include/linux
File: omap3isp.h
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
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/*
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* omap3isp.h
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*
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* TI OMAP3 ISP - User-space API
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*
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* Copyright (C) 2010 Nokia Corporation
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* Copyright (C) 2009 Texas Instruments, Inc.
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*
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* Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
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* Sakari Ailus <sakari.ailus@iki.fi>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
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* 02110-1301 USA
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*/
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#ifndef OMAP3_ISP_USER_H
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#define OMAP3_ISP_USER_H
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#include <linux/types.h>
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#include <linux/videodev2.h>
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/*
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* Private IOCTLs
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*
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* VIDIOC_OMAP3ISP_CCDC_CFG: Set CCDC configuration
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* VIDIOC_OMAP3ISP_PRV_CFG: Set preview engine configuration
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* VIDIOC_OMAP3ISP_AEWB_CFG: Set AEWB module configuration
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* VIDIOC_OMAP3ISP_HIST_CFG: Set histogram module configuration
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* VIDIOC_OMAP3ISP_AF_CFG: Set auto-focus module configuration
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* VIDIOC_OMAP3ISP_STAT_REQ: Read statistics (AEWB/AF/histogram) data
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* VIDIOC_OMAP3ISP_STAT_EN: Enable/disable a statistics module
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*/
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#define VIDIOC_OMAP3ISP_CCDC_CFG \
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_IOWR('V', BASE_VIDIOC_PRIVATE + 1, struct omap3isp_ccdc_update_config)
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#define VIDIOC_OMAP3ISP_PRV_CFG \
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_IOWR('V', BASE_VIDIOC_PRIVATE + 2, struct omap3isp_prev_update_config)
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#define VIDIOC_OMAP3ISP_AEWB_CFG \
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_IOWR('V', BASE_VIDIOC_PRIVATE + 3, struct omap3isp_h3a_aewb_config)
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#define VIDIOC_OMAP3ISP_HIST_CFG \
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_IOWR('V', BASE_VIDIOC_PRIVATE + 4, struct omap3isp_hist_config)
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#define VIDIOC_OMAP3ISP_AF_CFG \
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_IOWR('V', BASE_VIDIOC_PRIVATE + 5, struct omap3isp_h3a_af_config)
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#define VIDIOC_OMAP3ISP_STAT_REQ \
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_IOWR('V', BASE_VIDIOC_PRIVATE + 6, struct omap3isp_stat_data)
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#define VIDIOC_OMAP3ISP_STAT_REQ_TIME32 \
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_IOWR('V', BASE_VIDIOC_PRIVATE + 6, struct omap3isp_stat_data_time32)
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#define VIDIOC_OMAP3ISP_STAT_EN \
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_IOWR('V', BASE_VIDIOC_PRIVATE + 7, unsigned long)
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/*
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* Events
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*
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* V4L2_EVENT_OMAP3ISP_AEWB: AEWB statistics data ready
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* V4L2_EVENT_OMAP3ISP_AF: AF statistics data ready
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* V4L2_EVENT_OMAP3ISP_HIST: Histogram statistics data ready
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*/
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#define V4L2_EVENT_OMAP3ISP_CLASS (V4L2_EVENT_PRIVATE_START | 0x100)
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#define V4L2_EVENT_OMAP3ISP_AEWB (V4L2_EVENT_OMAP3ISP_CLASS | 0x1)
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#define V4L2_EVENT_OMAP3ISP_AF (V4L2_EVENT_OMAP3ISP_CLASS | 0x2)
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#define V4L2_EVENT_OMAP3ISP_HIST (V4L2_EVENT_OMAP3ISP_CLASS | 0x3)
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struct omap3isp_stat_event_status {
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__u32 frame_number;
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__u16 config_counter;
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__u8 buf_err;
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};
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/* AE/AWB related structures and flags*/
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/* H3A Range Constants */
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#define OMAP3ISP_AEWB_MAX_SATURATION_LIM 1023
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#define OMAP3ISP_AEWB_MIN_WIN_H 2
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#define OMAP3ISP_AEWB_MAX_WIN_H 256
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#define OMAP3ISP_AEWB_MIN_WIN_W 6
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#define OMAP3ISP_AEWB_MAX_WIN_W 256
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#define OMAP3ISP_AEWB_MIN_WINVC 1
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#define OMAP3ISP_AEWB_MIN_WINHC 1
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#define OMAP3ISP_AEWB_MAX_WINVC 128
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#define OMAP3ISP_AEWB_MAX_WINHC 36
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#define OMAP3ISP_AEWB_MAX_WINSTART 4095
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#define OMAP3ISP_AEWB_MIN_SUB_INC 2
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#define OMAP3ISP_AEWB_MAX_SUB_INC 32
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#define OMAP3ISP_AEWB_MAX_BUF_SIZE 83600
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#define OMAP3ISP_AF_IIRSH_MIN 0
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#define OMAP3ISP_AF_IIRSH_MAX 4095
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#define OMAP3ISP_AF_PAXEL_HORIZONTAL_COUNT_MIN 1
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#define OMAP3ISP_AF_PAXEL_HORIZONTAL_COUNT_MAX 36
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#define OMAP3ISP_AF_PAXEL_VERTICAL_COUNT_MIN 1
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#define OMAP3ISP_AF_PAXEL_VERTICAL_COUNT_MAX 128
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#define OMAP3ISP_AF_PAXEL_INCREMENT_MIN 2
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#define OMAP3ISP_AF_PAXEL_INCREMENT_MAX 32
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#define OMAP3ISP_AF_PAXEL_HEIGHT_MIN 2
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#define OMAP3ISP_AF_PAXEL_HEIGHT_MAX 256
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#define OMAP3ISP_AF_PAXEL_WIDTH_MIN 16
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#define OMAP3ISP_AF_PAXEL_WIDTH_MAX 256
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#define OMAP3ISP_AF_PAXEL_HZSTART_MIN 1
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#define OMAP3ISP_AF_PAXEL_HZSTART_MAX 4095
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#define OMAP3ISP_AF_PAXEL_VTSTART_MIN 0
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#define OMAP3ISP_AF_PAXEL_VTSTART_MAX 4095
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#define OMAP3ISP_AF_THRESHOLD_MAX 255
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#define OMAP3ISP_AF_COEF_MAX 4095
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#define OMAP3ISP_AF_PAXEL_SIZE 48
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#define OMAP3ISP_AF_MAX_BUF_SIZE 221184
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/**
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* struct omap3isp_h3a_aewb_config - AE AWB configuration reset values
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* saturation_limit: Saturation limit.
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* @win_height: Window Height. Range 2 - 256, even values only.
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* @win_width: Window Width. Range 6 - 256, even values only.
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* @ver_win_count: Vertical Window Count. Range 1 - 128.
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* @hor_win_count: Horizontal Window Count. Range 1 - 36.
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* @ver_win_start: Vertical Window Start. Range 0 - 4095.
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* @hor_win_start: Horizontal Window Start. Range 0 - 4095.
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* @blk_ver_win_start: Black Vertical Windows Start. Range 0 - 4095.
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* @blk_win_height: Black Window Height. Range 2 - 256, even values only.
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* @subsample_ver_inc: Subsample Vertical points increment Range 2 - 32, even
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* values only.
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* @subsample_hor_inc: Subsample Horizontal points increment Range 2 - 32, even
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* values only.
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* @alaw_enable: AEW ALAW EN flag.
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*/
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struct omap3isp_h3a_aewb_config {
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/*
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* Common fields.
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* They should be the first ones and must be in the same order as in
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* ispstat_generic_config struct.
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*/
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__u32 buf_size;
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__u16 config_counter;
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/* Private fields */
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__u16 saturation_limit;
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__u16 win_height;
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__u16 win_width;
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__u16 ver_win_count;
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__u16 hor_win_count;
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__u16 ver_win_start;
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__u16 hor_win_start;
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__u16 blk_ver_win_start;
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__u16 blk_win_height;
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__u16 subsample_ver_inc;
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__u16 subsample_hor_inc;
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__u8 alaw_enable;
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};
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/**
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* struct omap3isp_stat_data - Statistic data sent to or received from user
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* @ts: Timestamp of returned framestats.
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* @buf: Pointer to pass to user.
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* @frame_number: Frame number of requested stats.
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* @cur_frame: Current frame number being processed.
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* @config_counter: Number of the configuration associated with the data.
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*/
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struct omap3isp_stat_data {
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struct timeval ts;
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void *buf;
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__u32 buf_size;
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__u16 frame_number;
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__u16 cur_frame;
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__u16 config_counter;
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};
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/* Histogram related structs */
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/* Flags for number of bins */
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#define OMAP3ISP_HIST_BINS_32 0
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#define OMAP3ISP_HIST_BINS_64 1
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#define OMAP3ISP_HIST_BINS_128 2
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#define OMAP3ISP_HIST_BINS_256 3
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/* Number of bins * 4 colors * 4-bytes word */
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#define OMAP3ISP_HIST_MEM_SIZE_BINS(n) ((1 << ((n)+5))*4*4)
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#define OMAP3ISP_HIST_MEM_SIZE 1024
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#define OMAP3ISP_HIST_MIN_REGIONS 1
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#define OMAP3ISP_HIST_MAX_REGIONS 4
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#define OMAP3ISP_HIST_MAX_WB_GAIN 255
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#define OMAP3ISP_HIST_MIN_WB_GAIN 0
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#define OMAP3ISP_HIST_MAX_BIT_WIDTH 14
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#define OMAP3ISP_HIST_MIN_BIT_WIDTH 8
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#define OMAP3ISP_HIST_MAX_WG 4
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#define OMAP3ISP_HIST_MAX_BUF_SIZE 4096
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/* Source */
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#define OMAP3ISP_HIST_SOURCE_CCDC 0
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#define OMAP3ISP_HIST_SOURCE_MEM 1
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/* CFA pattern */
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#define OMAP3ISP_HIST_CFA_BAYER 0
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#define OMAP3ISP_HIST_CFA_FOVEONX3 1
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struct omap3isp_hist_region {
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__u16 h_start;
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__u16 h_end;
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__u16 v_start;
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__u16 v_end;
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};
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struct omap3isp_hist_config {
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/*
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* Common fields.
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* They should be the first ones and must be in the same order as in
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* ispstat_generic_config struct.
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*/
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__u32 buf_size;
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__u16 config_counter;
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__u8 num_acc_frames; /* Num of image frames to be processed and
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accumulated for each histogram frame */
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__u16 hist_bins; /* number of bins: 32, 64, 128, or 256 */
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__u8 cfa; /* BAYER or FOVEON X3 */
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__u8 wg[OMAP3ISP_HIST_MAX_WG]; /* White Balance Gain */
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__u8 num_regions; /* number of regions to be configured */
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struct omap3isp_hist_region region[OMAP3ISP_HIST_MAX_REGIONS];
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};
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/* Auto Focus related structs */
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#define OMAP3ISP_AF_NUM_COEF 11
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enum omap3isp_h3a_af_fvmode {
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OMAP3ISP_AF_MODE_SUMMED = 0,
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OMAP3ISP_AF_MODE_PEAK = 1
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};
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/* Red, Green, and blue pixel location in the AF windows */
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enum omap3isp_h3a_af_rgbpos {
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OMAP3ISP_AF_GR_GB_BAYER = 0, /* GR and GB as Bayer pattern */
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OMAP3ISP_AF_RG_GB_BAYER = 1, /* RG and GB as Bayer pattern */
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OMAP3ISP_AF_GR_BG_BAYER = 2, /* GR and BG as Bayer pattern */
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OMAP3ISP_AF_RG_BG_BAYER = 3, /* RG and BG as Bayer pattern */
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OMAP3ISP_AF_GG_RB_CUSTOM = 4, /* GG and RB as custom pattern */
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OMAP3ISP_AF_RB_GG_CUSTOM = 5 /* RB and GG as custom pattern */
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};
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/* Contains the information regarding the Horizontal Median Filter */
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struct omap3isp_h3a_af_hmf {
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__u8 enable; /* Status of Horizontal Median Filter */
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__u8 threshold; /* Threshold Value for Horizontal Median Filter */
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};
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/* Contains the information regarding the IIR Filters */
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struct omap3isp_h3a_af_iir {
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__u16 h_start; /* IIR horizontal start */
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__u16 coeff_set0[OMAP3ISP_AF_NUM_COEF]; /* Filter coefficient, set 0 */
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__u16 coeff_set1[OMAP3ISP_AF_NUM_COEF]; /* Filter coefficient, set 1 */
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};
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/* Contains the information regarding the Paxels Structure in AF Engine */
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struct omap3isp_h3a_af_paxel {
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__u16 h_start; /* Horizontal Start Position */
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__u16 v_start; /* Vertical Start Position */
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__u8 width; /* Width of the Paxel */
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__u8 height; /* Height of the Paxel */
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__u8 h_cnt; /* Horizontal Count */
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__u8 v_cnt; /* vertical Count */
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__u8 line_inc; /* Line Increment */
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};
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/* Contains the parameters required for hardware set up of AF Engine */
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struct omap3isp_h3a_af_config {
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/*
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* Common fields.
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* They should be the first ones and must be in the same order as in
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* ispstat_generic_config struct.
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*/
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__u32 buf_size;
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__u16 config_counter;
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struct omap3isp_h3a_af_hmf hmf; /* HMF configurations */
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struct omap3isp_h3a_af_iir iir; /* IIR filter configurations */
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struct omap3isp_h3a_af_paxel paxel; /* Paxel parameters */
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enum omap3isp_h3a_af_rgbpos rgb_pos; /* RGB Positions */
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enum omap3isp_h3a_af_fvmode fvmode; /* Accumulator mode */
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__u8 alaw_enable; /* AF ALAW status */
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};
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/* ISP CCDC structs */
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/* Abstraction layer CCDC configurations */
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#define OMAP3ISP_CCDC_ALAW (1 << 0)
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#define OMAP3ISP_CCDC_LPF (1 << 1)
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#define OMAP3ISP_CCDC_BLCLAMP (1 << 2)
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#define OMAP3ISP_CCDC_BCOMP (1 << 3)
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#define OMAP3ISP_CCDC_FPC (1 << 4)
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#define OMAP3ISP_CCDC_CULL (1 << 5)
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#define OMAP3ISP_CCDC_CONFIG_LSC (1 << 7)
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#define OMAP3ISP_CCDC_TBL_LSC (1 << 8)
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#define OMAP3ISP_RGB_MAX 3
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/* Enumeration constants for Alaw input width */
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enum omap3isp_alaw_ipwidth {
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OMAP3ISP_ALAW_BIT12_3 = 0x3,
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OMAP3ISP_ALAW_BIT11_2 = 0x4,
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OMAP3ISP_ALAW_BIT10_1 = 0x5,
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OMAP3ISP_ALAW_BIT9_0 = 0x6
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};
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/**
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* struct omap3isp_ccdc_lsc_config - LSC configuration
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* @offset: Table Offset of the gain table.
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* @gain_mode_n: Vertical dimension of a paxel in LSC configuration.
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* @gain_mode_m: Horizontal dimension of a paxel in LSC configuration.
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* @gain_format: Gain table format.
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* @fmtsph: Start pixel horizontal from start of the HS sync pulse.
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* @fmtlnh: Number of pixels in horizontal direction to use for the data
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* reformatter.
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* @fmtslv: Start line from start of VS sync pulse for the data reformatter.
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* @fmtlnv: Number of lines in vertical direction for the data reformatter.
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* @initial_x: X position, in pixels, of the first active pixel in reference
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* to the first active paxel. Must be an even number.
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* @initial_y: Y position, in pixels, of the first active pixel in reference
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* to the first active paxel. Must be an even number.
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* @size: Size of LSC gain table. Filled when loaded from userspace.
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*/
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struct omap3isp_ccdc_lsc_config {
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__u16 offset;
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__u8 gain_mode_n;
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__u8 gain_mode_m;
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__u8 gain_format;
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__u16 fmtsph;
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__u16 fmtlnh;
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__u16 fmtslv;
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__u16 fmtlnv;
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__u8 initial_x;
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__u8 initial_y;
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__u32 size;
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};
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/**
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* struct omap3isp_ccdc_bclamp - Optical & Digital black clamp subtract
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* @obgain: Optical black average gain.
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* @obstpixel: Start Pixel w.r.t. HS pulse in Optical black sample.
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* @oblines: Optical Black Sample lines.
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* @oblen: Optical Black Sample Length.
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* @dcsubval: Digital Black Clamp subtract value.
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*/
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struct omap3isp_ccdc_bclamp {
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__u8 obgain;
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__u8 obstpixel;
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__u8 oblines;
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__u8 oblen;
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__u16 dcsubval;
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};
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/**
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* struct omap3isp_ccdc_fpc - Faulty Pixels Correction
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* @fpnum: Number of faulty pixels to be corrected in the frame.
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* @fpcaddr: Memory address of the FPC Table
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*/
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struct omap3isp_ccdc_fpc {
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__u16 fpnum;
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__u32 fpcaddr;
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};
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/**
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* struct omap3isp_ccdc_blcomp - Black Level Compensation parameters
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* @b_mg: B/Mg pixels. 2's complement. -128 to +127.
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* @gb_g: Gb/G pixels. 2's complement. -128 to +127.
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* @gr_cy: Gr/Cy pixels. 2's complement. -128 to +127.
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* @r_ye: R/Ye pixels. 2's complement. -128 to +127.
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*/
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struct omap3isp_ccdc_blcomp {
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__u8 b_mg;
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__u8 gb_g;
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__u8 gr_cy;
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__u8 r_ye;
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};
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/**
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* omap3isp_ccdc_culling - Culling parameters
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* @v_pattern: Vertical culling pattern.
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* @h_odd: Horizontal Culling pattern for odd lines.
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* @h_even: Horizontal Culling pattern for even lines.
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*/
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struct omap3isp_ccdc_culling {
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__u8 v_pattern;
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__u16 h_odd;
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__u16 h_even;
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};
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/**
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* omap3isp_ccdc_update_config - CCDC configuration
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* @update: Specifies which CCDC registers should be updated.
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* @flag: Specifies which CCDC functions should be enabled.
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* @alawip: Enable/Disable A-Law compression.
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* @bclamp: Black clamp control register.
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* @blcomp: Black level compensation value for RGrGbB Pixels. 2's complement.
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* @fpc: Number of faulty pixels corrected in the frame, address of FPC table.
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* @cull: Cull control register.
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* @lsc: Pointer to LSC gain table.
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*/
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struct omap3isp_ccdc_update_config {
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__u16 update;
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__u16 flag;
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enum omap3isp_alaw_ipwidth alawip;
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struct omap3isp_ccdc_bclamp *bclamp;
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struct omap3isp_ccdc_blcomp *blcomp;
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struct omap3isp_ccdc_fpc *fpc;
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struct omap3isp_ccdc_lsc_config *lsc_cfg;
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struct omap3isp_ccdc_culling *cull;
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__u8 *lsc;
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};
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/* Preview configurations */
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#define OMAP3ISP_PREV_LUMAENH (1 << 0)
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#define OMAP3ISP_PREV_INVALAW (1 << 1)
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#define OMAP3ISP_PREV_HRZ_MED (1 << 2)
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#define OMAP3ISP_PREV_CFA (1 << 3)
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#define OMAP3ISP_PREV_CHROMA_SUPP (1 << 4)
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#define OMAP3ISP_PREV_WB (1 << 5)
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#define OMAP3ISP_PREV_BLKADJ (1 << 6)
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#define OMAP3ISP_PREV_RGB2RGB (1 << 7)
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#define OMAP3ISP_PREV_COLOR_CONV (1 << 8)
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#define OMAP3ISP_PREV_YC_LIMIT (1 << 9)
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#define OMAP3ISP_PREV_DEFECT_COR (1 << 10)
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/* Bit 11 was OMAP3ISP_PREV_GAMMABYPASS, now merged with OMAP3ISP_PREV_GAMMA */
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#define OMAP3ISP_PREV_DRK_FRM_CAPTURE (1 << 12)
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#define OMAP3ISP_PREV_DRK_FRM_SUBTRACT (1 << 13)
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#define OMAP3ISP_PREV_LENS_SHADING (1 << 14)
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#define OMAP3ISP_PREV_NF (1 << 15)
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#define OMAP3ISP_PREV_GAMMA (1 << 16)
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#define OMAP3ISP_PREV_NF_TBL_SIZE 64
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#define OMAP3ISP_PREV_CFA_TBL_SIZE 576
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#define OMAP3ISP_PREV_CFA_BLK_SIZE (OMAP3ISP_PREV_CFA_TBL_SIZE / 4)
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#define OMAP3ISP_PREV_GAMMA_TBL_SIZE 1024
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#define OMAP3ISP_PREV_YENH_TBL_SIZE 128
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[445] Fix | Delete
#define OMAP3ISP_PREV_DETECT_CORRECT_CHANNELS 4
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/**
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* struct omap3isp_prev_hmed - Horizontal Median Filter
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* @odddist: Distance between consecutive pixels of same color in the odd line.
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* @evendist: Distance between consecutive pixels of same color in the even
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* line.
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* @thres: Horizontal median filter threshold.
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*/
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struct omap3isp_prev_hmed {
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__u8 odddist;
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__u8 evendist;
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__u8 thres;
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};
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/*
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* Enumeration for CFA Formats supported by preview
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*/
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enum omap3isp_cfa_fmt {
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OMAP3ISP_CFAFMT_BAYER,
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OMAP3ISP_CFAFMT_SONYVGA,
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OMAP3ISP_CFAFMT_RGBFOVEON,
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OMAP3ISP_CFAFMT_DNSPL,
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OMAP3ISP_CFAFMT_HONEYCOMB,
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OMAP3ISP_CFAFMT_RRGGBBFOVEON
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};
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/**
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* struct omap3isp_prev_cfa - CFA Interpolation
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* @format: CFA Format Enum value supported by preview.
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* @gradthrs_vert: CFA Gradient Threshold - Vertical.
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* @gradthrs_horz: CFA Gradient Threshold - Horizontal.
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* @table: Pointer to the CFA table.
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*/
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struct omap3isp_prev_cfa {
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enum omap3isp_cfa_fmt format;
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__u8 gradthrs_vert;
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__u8 gradthrs_horz;
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__u32 table[4][OMAP3ISP_PREV_CFA_BLK_SIZE];
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};
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[486] Fix | Delete
/**
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* struct omap3isp_prev_csup - Chrominance Suppression
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* @gain: Gain.
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* @thres: Threshold.
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* @hypf_en: Flag to enable/disable the High Pass Filter.
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*/
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struct omap3isp_prev_csup {
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__u8 gain;
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__u8 thres;
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__u8 hypf_en;
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};
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[498] Fix | Delete
/**
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12
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Function