/*

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* Copyright (C) Internet Systems Consortium, Inc. ("ISC")

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*

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* This Source Code Form is subject to the terms of the Mozilla Public

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* License, v. 2.0. If a copy of the MPL was not distributed with this

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* file, you can obtain one at https://mozilla.org/MPL/2.0/.

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*

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* See the COPYRIGHT file distributed with this work for additional

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* information regarding copyright ownership.

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*/

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#ifndef ISC_ATOMIC_H

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#define ISC_ATOMIC_H 1

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#include <inttypes.h>

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#include <isc/platform.h>

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#include <isc/types.h>

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#ifdef ISC_PLATFORM_USEGCCASM

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/*

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* This routine atomically increments the value stored in 'p' by 'val', and

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* returns the previous value.

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*/

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static __inline__ int32_t

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isc_atomic_xadd(int32_t *p, int32_t val) {

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int32_t prev = val;

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__asm__ volatile(

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#ifdef ISC_PLATFORM_USETHREADS

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"lock;"

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#endif

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"xadd %0, %1"

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:"=q"(prev)

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:"m"(*p), "0"(prev)

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:"memory", "cc");

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return (prev);

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}

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#ifdef ISC_PLATFORM_HAVEXADDQ

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static __inline__ int64_t

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isc_atomic_xaddq(int64_t *p, int64_t val) {

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int64_t prev = val;

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__asm__ volatile(

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#ifdef ISC_PLATFORM_USETHREADS

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"lock;"

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#endif

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"xaddq %0, %1"

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:"=q"(prev)

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:"m"(*p), "0"(prev)

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:"memory", "cc");

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return (prev);

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}

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#endif /* ISC_PLATFORM_HAVEXADDQ */

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/*

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* This routine atomically stores the value 'val' in 'p' (32-bit version).

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*/

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static __inline__ void

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isc_atomic_store(int32_t *p, int32_t val) {

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__asm__ volatile(

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#ifdef ISC_PLATFORM_USETHREADS

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/*

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* xchg should automatically lock memory, but we add it

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* explicitly just in case (it at least doesn't harm)

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*/

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"lock;"

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#endif

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"xchgl %1, %0"

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:

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: "r"(val), "m"(*p)

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: "memory");

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}

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#ifdef ISC_PLATFORM_HAVEATOMICSTOREQ

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/*

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* This routine atomically stores the value 'val' in 'p' (64-bit version).

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*/

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static __inline__ void

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isc_atomic_storeq(int64_t *p, int64_t val) {

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__asm__ volatile(

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#ifdef ISC_PLATFORM_USETHREADS

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/*

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* xchg should automatically lock memory, but we add it

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* explicitly just in case (it at least doesn't harm)

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*/

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"lock;"

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#endif

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"xchgq %1, %0"

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:

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: "r"(val), "m"(*p)

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: "memory");

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}

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#endif /* ISC_PLATFORM_HAVEATOMICSTOREQ */

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/*

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* This routine atomically replaces the value in 'p' with 'val', if the

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* original value is equal to 'cmpval'. The original value is returned in any

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* case.

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*/

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static __inline__ int32_t

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isc_atomic_cmpxchg(int32_t *p, int32_t cmpval, int32_t val) {

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__asm__ volatile(

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#ifdef ISC_PLATFORM_USETHREADS

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"lock;"

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#endif

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"cmpxchgl %1, %2"

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: "=a"(cmpval)

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: "r"(val), "m"(*p), "a"(cmpval)

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: "memory");

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return (cmpval);

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}

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#elif defined(ISC_PLATFORM_USESTDASM)

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/*

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* The following are "generic" assembly code which implements the same

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* functionality in case the gcc extension cannot be used. It should be

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* better to avoid inlining below, since we directly refer to specific

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* positions of the stack frame, which would not actually point to the

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* intended address in the embedded mnemonic.

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*/

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static int32_t

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isc_atomic_xadd(int32_t *p, int32_t val) {

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(void)(p);

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(void)(val);

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__asm (

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"movl 8(%ebp), %ecx\n"

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"movl 12(%ebp), %edx\n"

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#ifdef ISC_PLATFORM_USETHREADS

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"lock;"

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#endif

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"xadd %edx, (%ecx)\n"

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/*

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* set the return value directly in the register so that we

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* can avoid guessing the correct position in the stack for a

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* local variable.

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*/

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"movl %edx, %eax"

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);

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}

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static void

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isc_atomic_store(int32_t *p, int32_t val) {

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(void)(p);

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(void)(val);

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__asm (

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"movl 8(%ebp), %ecx\n"

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"movl 12(%ebp), %edx\n"

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#ifdef ISC_PLATFORM_USETHREADS

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"lock;"

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#endif

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"xchgl (%ecx), %edx\n"

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);

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}

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static int32_t

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isc_atomic_cmpxchg(int32_t *p, int32_t cmpval, int32_t val) {

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(void)(p);

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(void)(cmpval);

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(void)(val);

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__asm (

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"movl 8(%ebp), %ecx\n"

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"movl 12(%ebp), %eax\n" /* must be %eax for cmpxchgl */

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"movl 16(%ebp), %edx\n"

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#ifdef ISC_PLATFORM_USETHREADS

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"lock;"

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#endif

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/*

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* If (%ecx) == %eax then (%ecx) := %edx.

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% %eax is set to old (%ecx), which will be the return value.

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*/

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"cmpxchgl %edx, (%ecx)"

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);

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}

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#else /* !ISC_PLATFORM_USEGCCASM && !ISC_PLATFORM_USESTDASM */

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#error "unsupported compiler. disable atomic ops by --disable-atomic"

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#endif

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#endif /* ISC_ATOMIC_H */

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