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/* SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR Linux-OpenIB) */

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* This software is available to you under a choice of one of two

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* licenses. You may choose to be licensed under the terms of the GNU

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* General Public License (GPL) Version 2, available from the file

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* COPYING in the main directory of this source tree, or the

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* OpenIB.org BSD license below:

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* Redistribution and use in source and binary forms, with or

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* without modification, are permitted provided that the following

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* conditions are met:

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* - Redistributions of source code must retain the above

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* copyright notice, this list of conditions and the following

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* disclaimer.

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* - Redistributions in binary form must reproduce the above

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* copyright notice, this list of conditions and the following

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* disclaimer in the documentation and/or other materials

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* provided with the distribution.

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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,

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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF

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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND

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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS

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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN

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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN

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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE

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* SOFTWARE.

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#ifndef MLX4_ABI_USER_H

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#define MLX4_ABI_USER_H

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#include <linux/types.h>

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* Increment this value if any changes that break userspace ABI

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* compatibility are made.

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#define MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION 3

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#define MLX4_IB_UVERBS_ABI_VERSION 4

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* Make sure that all structs defined in this file remain laid out so

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* that they pack the same way on 32-bit and 64-bit architectures (to

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* avoid incompatibility between 32-bit userspace and 64-bit kernels).

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* In particular do not use pointer types -- pass pointers in __u64

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* instead.

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struct mlx4_ib_alloc_ucontext_resp_v3 {

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__u32 qp_tab_size;

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__u16 bf_reg_size;

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__u16 bf_regs_per_page;

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};

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enum {

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MLX4_USER_DEV_CAP_LARGE_CQE = 1L << 0,

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};

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struct mlx4_ib_alloc_ucontext_resp {

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__u32 dev_caps;

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__u32 qp_tab_size;

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__u16 bf_reg_size;

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__u16 bf_regs_per_page;

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__u32 cqe_size;

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};

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struct mlx4_ib_alloc_pd_resp {

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__u32 pdn;

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__u32 reserved;

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};

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struct mlx4_ib_create_cq {

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__aligned_u64 buf_addr;

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__aligned_u64 db_addr;

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};

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struct mlx4_ib_create_cq_resp {

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__u32 cqn;

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__u32 reserved;

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};

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struct mlx4_ib_resize_cq {

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__aligned_u64 buf_addr;

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};

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struct mlx4_ib_create_srq {

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__aligned_u64 buf_addr;

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__aligned_u64 db_addr;

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};

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struct mlx4_ib_create_srq_resp {

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__u32 srqn;

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__u32 reserved;

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};

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struct mlx4_ib_create_qp_rss {

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__aligned_u64 rx_hash_fields_mask; /* Use enum mlx4_ib_rx_hash_fields */

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__u8 rx_hash_function; /* Use enum mlx4_ib_rx_hash_function_flags */

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__u8 reserved[7];

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__u8 rx_hash_key[40];

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__u32 comp_mask;

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__u32 reserved1;

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};

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struct mlx4_ib_create_qp {

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__aligned_u64 buf_addr;

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__aligned_u64 db_addr;

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__u8 log_sq_bb_count;

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__u8 log_sq_stride;

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__u8 sq_no_prefetch;

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__u8 reserved;

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__u32 inl_recv_sz;

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};

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struct mlx4_ib_create_wq {

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__aligned_u64 buf_addr;

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__aligned_u64 db_addr;

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__u8 log_range_size;

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__u8 reserved[3];

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__u32 comp_mask;

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};

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struct mlx4_ib_modify_wq {

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__u32 comp_mask;

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__u32 reserved;

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};

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struct mlx4_ib_create_rwq_ind_tbl_resp {

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__u32 response_length;

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__u32 reserved;

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};

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/* RX Hash function flags */

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enum mlx4_ib_rx_hash_function_flags {

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MLX4_IB_RX_HASH_FUNC_TOEPLITZ = 1 << 0,

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};

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* RX Hash flags, these flags allows to set which incoming packet's field should

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* participates in RX Hash. Each flag represent certain packet's field,

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* when the flag is set the field that is represented by the flag will

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* participate in RX Hash calculation.

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enum mlx4_ib_rx_hash_fields {

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MLX4_IB_RX_HASH_SRC_IPV4 = 1 << 0,

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MLX4_IB_RX_HASH_DST_IPV4 = 1 << 1,

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MLX4_IB_RX_HASH_SRC_IPV6 = 1 << 2,

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MLX4_IB_RX_HASH_DST_IPV6 = 1 << 3,

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MLX4_IB_RX_HASH_SRC_PORT_TCP = 1 << 4,

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MLX4_IB_RX_HASH_DST_PORT_TCP = 1 << 5,

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MLX4_IB_RX_HASH_SRC_PORT_UDP = 1 << 6,

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MLX4_IB_RX_HASH_DST_PORT_UDP = 1 << 7,

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MLX4_IB_RX_HASH_INNER = 1ULL << 31,

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};

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struct mlx4_ib_rss_caps {

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__aligned_u64 rx_hash_fields_mask; /* enum mlx4_ib_rx_hash_fields */

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__u8 rx_hash_function; /* enum mlx4_ib_rx_hash_function_flags */

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__u8 reserved[7];

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};

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enum query_device_resp_mask {

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MLX4_IB_QUERY_DEV_RESP_MASK_CORE_CLOCK_OFFSET = 1UL << 0,

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};

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struct mlx4_ib_tso_caps {

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__u32 max_tso; /* Maximum tso payload size in bytes */

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/* Corresponding bit will be set if qp type from

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* 'enum ib_qp_type' is supported.

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__u32 supported_qpts;

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};

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struct mlx4_uverbs_ex_query_device_resp {

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__u32 comp_mask;

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__u32 response_length;

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__aligned_u64 hca_core_clock_offset;

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__u32 max_inl_recv_sz;

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__u32 reserved;

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struct mlx4_ib_rss_caps rss_caps;

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struct mlx4_ib_tso_caps tso_caps;

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};

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#endif /* MLX4_ABI_USER_H */

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